چكيده به لاتين
Abstract:
Since implementation is mostly attacked in cryptography systems, thus strengthening the implementation methods against such attacks is of paramount importance. Differential power analysis attack is the most powerful one that only deals with the power consumption to retrieve the key. A variety of methods have been proposed by researchers to prevent this type of attacks, including strengthening circuits and upgrading manufacturing technology, creating random processes at the gate level, and reducing the effect of processing data on power consumption. However, because the data prediction-based (DPA) method is based upon the estimation of part of the key, and therefore, on the basis of investigation of the power consumption behavior to test the validity of the key estimation, the main idea of the proposed approach is to make the quantities obtained in the encryption process unpredictable independent of the circuit and the environment in which the encryption is implemented. The new approach is a novel architecture of AES that utilizes complementary parallel blocks (CPB) to propagate additional information on the power consumption routes in random order, and thereby leaked information in the form of power consumption variations becomes non-trackable. With this method, equivalent complementary blocks of AES should be designed. In the next stage, the implementation process selects complementary or normal block at random and runs it. This random selection is unpredictable due to its dependence on encrypting key. This research focuses on DPA attacks performed against AES encryption systems. However, the proposed method could be extensively employed to various systems and against numerous attacks that are devised based on power consumption. This approach is implemented on block level that is more applicable and cost-effective than gate and transistor levels.
Keywords: Advanced Encryption Standard (AES), Power Differential Analysis (DPA), Side Channel Analysis (SCA), Cryptography, Block Cipher.
