پيمان اهنين جان

Traditional image processing algorithms are inherently sequential. When implemented in a real-time system, they often lead to high response times. On embedded platforms, such algorithms consume more energy due to the larger number of clock cycles required for execution. With the advent of Field Programmable Gate Arrays (FPGAs), it has become possible to design highly parallel architectures to accelerate the execution of various image processing algorithms. In the paper titled *"Accelerating CNN inference on FPGAs: A Survey"*, the authors provide a comprehensive review of methods for accelerating convolutional neural network (CNN) inference using FPGAs. They analyze computational workloads, parallelization strategies, an‎d memory access patterns, an‎d they explore various optimizations at both the neuron an‎d network levels. Another influential work in this area was conducted by David Gschwend. In his masterʹs thesis titled *"ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"*, he designed an‎d implemented an optimized CNN for image classification. The network was deployed on a Zynq FPGA platform an‎d achieved high performance through the use of High-Level Synthesis (HLS) techniques. Another research group, in a paper titled *"Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs"*, investigated the use of fast convolution algorithms such as Winograd an‎d FFT to accelerate face recognition on FPGAs. They designed an IP-based accelerator system for FaceNet, implemented on a Xilinx Ultrascale device, which outperformed advanced GPUs in terms of speed. In this report, I also performed both hardware an‎d software simulations of two key image processing algorithms: NLM (Non-Local Means) an‎d Histogram Equalization. For the NLM algorithm, implementing it on an FPGA (Spartan6) resulted in a 100x speedup compared to a CPU-based implementation. The same process was applied to the Histogram Equalization algorithm, which achieved a 20x acceleration.

پردازش تصوير , سيستم تعبيه‌شده , آرايه دروازه قابل برنامه‌ريزي ميداني

image processing , Embedded System , Field-Programmable Gate Array (FPGA)

Peyman Ahanin jan

Dr Sattar Mirzakuchaki