• RecordNumber
    25617
  • Title

    Cache and interconnect architectures in multiprocessors

  • Author Statement
    Edited by Michel Dubois and Shreekant S. Thakkar
  • Publication
    Kluwer Acad
  • Publication Year
    1990
  • Collation
    xii, 277P., illus., diags., tables
  • Notes
    0792390741 , Includes bibliographical references , Papers presented at a workshop titled Cache and Interconnect Architectures in Multiprocessors, held in Eilat, Israel, May 25-26, 1989
  • Subject

    Computer network architectures , Multiprocessors , Computer network protocols

  • ADDED ENTRIES
    Thakkar, S. S. , Dubois, Michel ,
  • LC Class
    TK
  • LC Number
    5105.5
  • LC CutterNumber
    .C33
    • Link To Document
    https://dl.iust.ac.ir/dl/search/default.aspx?Term=25617&Field=0&DTC=2