• RecordNumber
    57039
  • Author

    Augusto Bezerra, Eduardo

  • Title

    Synthesizable VHDL Design for FPGAs

  • Author Statement
    Eduardo Augusto Bezerra; Djones Vinicius Lettnin
  • Publication
    Cham: Springer
  • Publication Year
    2014
  • Collation
    1 online resource (vii, 157 pages) : illus
  • Notes
    Description based upon print version of record , 9783319025476
  • Subject

    VHDL (Computer hardware description language) , Field programmable gate arrays , Engineering , Logic design

  • ADDED ENTRIES
    AU Lettnin, Djones Vinicius , TI
  • LC Class
    TK
  • LC Number
    7885.7
  • LC CutterNumber
    .A8
  • LC Date
    2014
  • نام فايل
    B704D14
    • Link To Document
    https://dl.iust.ac.ir/dl/search/default.aspx?Term=57039&Field=0&DTC=2