چكيده به لاتين
Abstract:
This thesis studies the structure of Global Navigation Satellite System (GNSS) receivers and proposes a new architecture to modify its function. In general, receivers include Antenna, Band Selection Filter, Low Noise Amplifier (LNA), Mixer, IF and Processor. The main concentration of this study focuses on LNA block architecture of GNSS receivers, in order to optimize its parameters.
This study proposes a new approach toward LNA design for a concurrent dual-band GNSS receiver, which is more applicable in terms of portability and handling. The new structure modifies Noise Figure (NF) parameter by considering two different techniques, feed forward path and load capacitor. These techniques would also result in a better gain performance. The elaborated design parameters has been discussed, using mathematical terms and equations. Simulations have run on ADS software, using 0.18 μm TSMC technology. Simulation results show that the proposed LNA has achieved the input matchings of -13.5 and -10.9 dB, the NFs of 1.5 and 1.4 dB, the gains of 24.6 and 24.7 dB, the P-1dBs of -16.5 and -16 dBm, and the IIP3s of -2.2 and -0.6 dBm at 1.2 and 1.57 GHz, simultaneously. Additionally, the current consumption of the proposed LNA is 18.9 mA from a 1.8 V supply voltage. Also, the layout of the proposed LNA is done with Cadence software and it’s area consumption is 0.68×0.85 mm2 (equal to 0.578 mm2).
Keywords: Global Navigation Satellite System, Low Noise Amplifier, Concurrent Low Noise Amplifier, Multi-Band Low Noise Amplifier
