چكيده به لاتين
Brain-inspired computing is an emerging field, which aims to use the capabilities of the human brain for information processing. It offers a new computing architecture beyond the Von Neumann architecture that is based on the distributed processing units (neurons) and distributed memories (synapses).
One of the main cognitive tasks of the brain is associative memory task. The brain is remarkable for large memory capacity and robust memory retrieval. Already, several architectures for associative memory has been introduce such as Hopfield Neural Network (HNN), Bidirectional Associative Memory (BAM), and Clique-Based Neural Network (CBNN). However, HNN and BAM suffer from the low storage capacity. Although the capacity of CBNN is large, it is based on the binary neurons which is known as a classical associative memory. On the other hand, spiking associative memory has not been widely developed, but simple models of the spiking HNN and spiking BAM have been introduced already. These models also suffer from the low capacity similar to their classic counterparts. In this thesis, a spiking associative memory with large capacity and robust retrieval is introduced that is inspired by the cortical structure. The proposed model is called Columnar-Organized Memory (COM). Its architecture is based on the spiking winner-take-all (WTA): There are lateral excitatory connections between the WTAs and lateral inhibitory connections between the neurons of a WTA. In theory, the capacity of COM is exponentially related to the number of the WTA neurons. In addition, the robustness of the COM is related to the excitatory connections between the WTAs. The average retrieval rate of COM for a noisy binary dataset (English Alphabet) is 1.3 times more than the individual WTAs without excitatory connections. In addition, the average retrieval rate of COM is 1.1 times better than the retrieval rate of the individual WTAs for a noisy real-valued dataset. This ratio is 1.5 and 2.2 for a noisy real-valued dataset with 25% and 50% erased data, respectively.
Furthermore, a hardware architecture is proposed to implement COM. The hardware is presented at three design levels. At the level I, a low-power circuit of a leaky integrate and fire neuron is introduced that is compatible with the architecture of COM. It consumes 4.3 pJ/spike, and its static power is 182 pW. In addition, the memristor crossbar array is used to design the synaptic circuit. At the level II, the assembly of the proposed neuron and a single memristor crossbar array are used to implement a WTA module and its operation is deliberated through a dataset. At the level III, a COM hardware architecture is developed using the combination of the WTA modules and memristor crossbar arrays. Random messages are applied to evaluate the message retrieval of the COM hardware. The average of message retrieval rate of the hardware and software-based simulation is about 0.94 and 0.96, respectively
Keywords: Associative memory, Spiking Neural Network, Neuromorphic, Memristor.
