امين الله جاني پور

The cache memory plays a critical role in improving processor efficiency. By temporarily storing frequently used data an‎d instructions, caches reduce data access time an‎d significantly enhance overall system performance. The primary technology used in current cache memories is SRAM, which is an ideal choice for higher levels of the memory hierarchy due to its high speed an‎d stability. However, challenges like high production costs an‎d relatively high power consumption remain. In recent years, there has been growing interest in non-volatile memories (NVMs) such as STT-MRAM an‎d PCM as potential alternatives to SRAM. These memories offer the potential to improve performance an‎d reduce costs due to their ability to retain data without power an‎d their higher density. However, challenges such as high power consumption during write operations an‎d limited cell lifespan have limited their practical applications. This research proposes an innovative approach to enhance the performance of non-volatile memories by reducing the amount of data transferred to the cache an‎d optimizing the number of write operations. The proposed architecture, named ReBECA, utilizes adaptive block sizes an‎d, through analyzing data access history an‎d identifying data locality, selec‎ts appropriate blocks for transfer to the cache. ReBECA reduces unnecessary an‎d unused data transfers, significantly decreasing the number of write operations. The use of adaptive architectures like ReBECA can help reduce energy costs, improve reliability in non-volatile memory-based processing systems, an‎d simultaneously increase system performance. Simulation results using tools such as gem5, NVSim, an‎d Design Compiler show that the proposed architecture has reduced energy consumption by up to 30% an‎d improved the volume of write operations by 25%. Additionally, ReBECA has led to a 15% improvement in overall system performance. Other significant achievements of this study include enhanced memory stability through high-temperature management an‎d a reduction in write operation failure rates, achieved by reducing the volume of written data.

حافظه غيرفرار , بهينەسازي حافظه نهان , اندازه بلوك تطبيق􏰀 , مديريت حرارت􏰀 در حافظەهاي نهان , محليت دادەها

Non-volatile Memory (NVM) , Cache Optimization , Adaptive Block Size , Thermal Management in Caches , Data Locality

AminAllah Janipoor

AmirMahdi Hosayni Monazah