Design an‎d simulation of a common-mode input insensitive dynamic comparator for low power applications

10/18/2026 12:00:00 AM

Comparators serve as a bridge between the analog an‎d digital domains, being regarded as one of the essential building blocks in analog-to-digital converters (ADCs). The performance of ADCs strongly depends on the stability an‎d speed of the comparator. Recent research on comparator design has primarily focused on minimizing delay, reducing sensitivity to the input common-mode voltage, an‎d optimizing power consumption. In this thesis, a two-stage dynamic comparator designed for high-speed operation under low supply voltages is presented. An innovative latch architecture, featuring a charge-sharing mechanism combined with a charge-conservative activation scheme, is proposed. A transmission gate (T-GATE) placed between the latch output nodes facilitates the charge sharing an‎d convergence of both outputs to approximately VDD/2 during the reset phase, which accelerates the activation of the back-to-back inverters during the comparison phase. Furthermore, the latch regeneration speed is enhanced using a charge-conservative technique, in which MOS capacitors (MOS-CAPs) apply variable negative potentials to the sources of the latch activator NMOS transistors, proportional to the input voltage difference (VINP an‎d VINN). Consequently, the overdrive voltage of these transistors increases, leading to an improved latch gain an‎d a significant reduction in comparison time. The proposed comparator was eva‎luated through post-layout simulations in a 65-nm CMOS process at supply voltages of 0.8 V an‎d 0.6 V. The results demonstrate stable delay performance across the input common-mode voltage range. Compared to conventional designs, the proposed comparator achieves approximately 2.5× lower delay. Furthermore, it attains a maximum sampling frequency of 2 GHz with a power consumption of 258.8 µW at 0.8 V, an‎d 0.5 GHz with 33.7 µW at 0.6 V. The active area of the proposed comparator is 210 µm².

رژيم تغذيه ‌كم‌ولتاژ , گستره‌ي ورودي حالت‌مشترك , اشتراك‌گذاري بار , شارژ محافظه‌كارانه

Low-voltage supply regime , input common-mode range , charge sharing , charge-conservative

Seyed Amir Hossein Hosseini Varaki

Dr. Seyed Adib Abrishamifar